Unit-I
Register Transfer Language, Bus and Memory Transfers, Bus Architecture, Bus Arbitration, Arithmetic Logic, Shift Microoperation, Arithmetic Logic Shift Unit, Design of Fast address, Arithmetic Algorithms (addition, subtraction, Booth Multiplication), IEEE standard for Floating point numbers.

Unit-II
Control Design:
Hardwired & Micro Programmed (Control Unit): Fundamental Concepts (Register Transfers, Performing of arithmetic or logical operations, Fetching a word from memory, storing a word in memory), Execution of a complete instruction, Multiple-Bus organization, Hardwired Control, Micro programmed control(Microinstruction, Microprogram sequencing, Wide-Branch addressing, Microinstruction with Next-address field, Prefetching Microinstruction).

Unit-III
Processor Design:
Processor Organization: General register organization, Stack organization, Addressing mode, Instruction format, Data transfer & manipulations, Program Control, Reduced Instruction Set Computer.
Unit -IV
Input-Output Organization:
I/O Interface, Modes of transfer, Interrupts & Interrupt handling, Direct Memory access, Input-Output processor, Serial Communication.
Unit-V
Memory Organization:
Memory Hierarchy, Main Memory (RAM and ROM Chips), organization of 2D and 21/2D, Auxiliary memory, Cache memory, Virtual Memory, Memory management hardware.

Text Book: 1. Computer System Architecture, M. Mano(PHI)
Reference Book: 1. Computer Organization, Vravice, Zaky & Hamacher (TMH Publication)
2. Structured Computer Organization, Tannenbaum(PHI)
3. Computer Organization, Stallings(PHI)
4. Computer Organization, John P.Hayes (McGraw Hill)